本帖最后由 1084504793 于 2024-1-7 14:47 编辑
在网上查到可以用CKLink可以仿真BL的芯片，也通过网上的教程用STM32F103制作了CKLink调试工具，但是用T-HeadDebugServer软件连接失败，所以请教下论坛的大佬们有没有知道原因的。错误提示是
设备管理的串口也是成功识别到CKLink的
错误提示信息为
- T-HEAD: CKLink_Lite_V2, App_ver 2.35, Bit_ver null, Clock 2526.316KHz,
- 5-wire, With DDC, Cache Flush On, SN CKLink_Lite_V2-45DA1328D8.
- Extra Info: hacr width is 8.
- ERROR: Fail to check had module of CPU 0, please check:
- 1. the physical connection;
- 2. the power of the target;
- 3. the link clock (link clock <= (CPU clock/2));
- 4. the reference voltage of link, default 3.3v;
- For more information, please run Debugserver with connect log:
- Console: run Debugserver with arguments "--debug connect".
- UI : select "Connect" from menu "Setting->Verbose Setting".
网上的两种接线方式也都试了
|
